1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device and the semiconductor device, in which an insulating substrate mounted with semiconductor elements and other electronic components is received inside a resin casing formed integrally with a lead frame by insert molding.
2. Description of the Background Art
For example, a background-art example shown in FIG. 3 of JP-A-11-330344 has been known as this kind of semiconductor device.
In FIG. 3 of JP-A-11-330344, each of tips of lower ends of external lead-out terminals to which bonding wires will be connected on a lead frame is bent into an L shape to form a horizontal portion, and insert molding is carried out so that the horizontal portion can protrude into an annular insulating casing. Of the horizontal portions of the external lead-out terminals protruding into the annular insulating casing, unnecessary parts are cut off after the insert molding.
In JP-A-2001-18252, a resin is injected in a state in which fixation pins for vertical regulation are disposed inside a mold to fix a lower surface of a lead frame, and molding is performed with the semi-melted resin while the fixation pins are retreated from the surface of the lead frame.
However, in JP-A-11-330344, the unnecessary parts of the external lead-out terminals are cut off after the insert molding. For this reason, stress is applied to the external lead-out terminals during the cutting so that there is a fear that portions of the external lead-out terminals to which bonding wires will be connected may be deformed as the thickness of each of the lead terminals is reduced. In addition, there is a fear that a gap may be generated between the external lead-out terminals and a resin layer of the insulating casing due to the stress applied during the cutting. Thus, there is a problem that wire bonding properties may be lowered to affect reliability of the semiconductor device, such as vibration test resistance, heat cycle resistance, etc. when bonding wires are bonded to the external lead-out terminals.
In addition, JP-A-2001-18252 has a problem that the places in which the lead frame is fixed by the fixation pins may be deformed as the thickness of each of the lead terminals is reduced, and wire bonding properties maybe lowered to affect reliability of the semiconductor device, such as vibration test resistance, heat cycle resistance, etc.